This thesis presents the design of a low-noise, high-PSRR low-dropout (LDO) regulator implemented in 22-nm CMOS technology for Bluetooth applications. The proposed regulator provides a stable, clean supply voltage for sensitive analog blocks while meeting constraints on low-voltage operation, compact area, and low power consumption. Particular attention is given to loop stability, transient response, and supply ripple rejection.
This thesis presents the design of a low-noise, high-PSRR low-dropout (LDO) regulator implemented in 22-nm CMOS technology for Bluetooth applications. The proposed regulator provides a stable, clean supply voltage for sensitive analog blocks while meeting constraints on low-voltage operation, compact area, and low power consumption. Particular attention is given to loop stability, transient response, and supply ripple rejection.
Design of a Low-Noise, High-PSRR LDO Regulator in 22-nm CMOS Technology for Bluetooth Applications
BRUDAGLIO, RICCARDO
2025/2026
Abstract
This thesis presents the design of a low-noise, high-PSRR low-dropout (LDO) regulator implemented in 22-nm CMOS technology for Bluetooth applications. The proposed regulator provides a stable, clean supply voltage for sensitive analog blocks while meeting constraints on low-voltage operation, compact area, and low power consumption. Particular attention is given to loop stability, transient response, and supply ripple rejection.| File | Dimensione | Formato | |
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Brudaglio_Riccardo.pdf
embargo fino al 06/04/2028
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5.26 MB | Adobe PDF |
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https://hdl.handle.net/20.500.12608/116232