A prototype of a new kind of silicon pixel sensor is studied in this work: the APiX (Avalanche PiXel sensor). The device, formed by two vertically-aligned pixel arrays, exploits the coincidence between two simultaneous avalanche events to discriminate between particle-triggered detections and dark counts. A proof-of-concept two-layer sensor with per-pixel coincidence circuits was designed and fabricated in a 150 nm CMOS process and vertically integrated through bump bonding. The sensor includes a 48 x 16 pixel array with 50 um x 75 um pixels. APiX is made of an array of avalanche pixels, that has been designed in a 180 nm CMOS process with high voltage (HV) option. This is a single poly, up to six metal technology. The array includes sensors with a pitch of 50um×100um, different size (20um×20um, 30um×30um and 45um×43um) and based on different process layers. Different versions of the front-end electronics, implementing a passive or active quenching technique to suppress the avalanche, have been monolithically integrated in the same substrate as the detector. The main purpose of this work is to investigate the characteristics of the technology in view of the fabrication of a dual-tier, low material budget sensor for charged particle detection and present the results from the chip characterization in terms of front-end electronics functionality, dark count rate, breakdown voltage, optical cross-talk, quantum efficiency and tracking efficiency with ionizing particles.

Study and characterization of the APIX sensor for particle tracking applications

Spadoni, Giuseppe
2016/2017

Abstract

A prototype of a new kind of silicon pixel sensor is studied in this work: the APiX (Avalanche PiXel sensor). The device, formed by two vertically-aligned pixel arrays, exploits the coincidence between two simultaneous avalanche events to discriminate between particle-triggered detections and dark counts. A proof-of-concept two-layer sensor with per-pixel coincidence circuits was designed and fabricated in a 150 nm CMOS process and vertically integrated through bump bonding. The sensor includes a 48 x 16 pixel array with 50 um x 75 um pixels. APiX is made of an array of avalanche pixels, that has been designed in a 180 nm CMOS process with high voltage (HV) option. This is a single poly, up to six metal technology. The array includes sensors with a pitch of 50um×100um, different size (20um×20um, 30um×30um and 45um×43um) and based on different process layers. Different versions of the front-end electronics, implementing a passive or active quenching technique to suppress the avalanche, have been monolithically integrated in the same substrate as the detector. The main purpose of this work is to investigate the characteristics of the technology in view of the fabrication of a dual-tier, low material budget sensor for charged particle detection and present the results from the chip characterization in terms of front-end electronics functionality, dark count rate, breakdown voltage, optical cross-talk, quantum efficiency and tracking efficiency with ionizing particles.
2016-10
98
APD, SPAD, APIX, noise and particles characterization
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.12608/23693