In this thesis, a characterization of vertical GaN transistors for power applications was carried out. The dynamics of threshold voltage and on-state resistance of the devices are the main parameters this work focused on; the analysis was initially performed through some DC measurements, that revealed some trapping in the devices, which led afterwards to the investigation of the threshold voltage shift through pulsed measurements. Trapping phenomena were deeply analyzed under different conditions: temperature, bias, optical stimulation, in order to achieve information on the characteristics of the defects responsible for the measured devices’ instabilities. Finally some drain current transients measurements were performed to investigate the on-resistance degradation. The data were finally analyzed to extract mathematical models that could explain the behavior of the devices. A part of the thesis was also focused on the development of a circuit designed to automatically extrapolate threshold voltage transients under stress condition for on-wafer devices.

In this thesis, a characterization of vertical GaN transistors for power applications was carried out. The dynamics of threshold voltage and on-state resistance of the devices are the main parameters this work focused on; the analysis was initially performed through some DC measurements, that revealed some trapping in the devices, which led afterwards to the investigation of the threshold voltage shift through pulsed measurements. Trapping phenomena were deeply analyzed under different conditions: temperature, bias, optical stimulation, in order to achieve information on the characteristics of the defects responsible for the measured devices’ instabilities. Finally some drain current transients measurements were performed to investigate the on-resistance degradation. The data were finally analyzed to extract mathematical models that could explain the behavior of the devices. A part of the thesis was also focused on the development of a circuit designed to automatically extrapolate threshold voltage transients under stress condition for on-wafer devices.

Characterization of threshold voltage and on-resistance dynamics in vertical GaN transistors for power electronics

CAPPELLETTO, LUCA
2021/2022

Abstract

In this thesis, a characterization of vertical GaN transistors for power applications was carried out. The dynamics of threshold voltage and on-state resistance of the devices are the main parameters this work focused on; the analysis was initially performed through some DC measurements, that revealed some trapping in the devices, which led afterwards to the investigation of the threshold voltage shift through pulsed measurements. Trapping phenomena were deeply analyzed under different conditions: temperature, bias, optical stimulation, in order to achieve information on the characteristics of the defects responsible for the measured devices’ instabilities. Finally some drain current transients measurements were performed to investigate the on-resistance degradation. The data were finally analyzed to extract mathematical models that could explain the behavior of the devices. A part of the thesis was also focused on the development of a circuit designed to automatically extrapolate threshold voltage transients under stress condition for on-wafer devices.
2021
Characterization of threshold voltage and on-resistance dynamics in vertical GaN transistors for power electronics
In this thesis, a characterization of vertical GaN transistors for power applications was carried out. The dynamics of threshold voltage and on-state resistance of the devices are the main parameters this work focused on; the analysis was initially performed through some DC measurements, that revealed some trapping in the devices, which led afterwards to the investigation of the threshold voltage shift through pulsed measurements. Trapping phenomena were deeply analyzed under different conditions: temperature, bias, optical stimulation, in order to achieve information on the characteristics of the defects responsible for the measured devices’ instabilities. Finally some drain current transients measurements were performed to investigate the on-resistance degradation. The data were finally analyzed to extract mathematical models that could explain the behavior of the devices. A part of the thesis was also focused on the development of a circuit designed to automatically extrapolate threshold voltage transients under stress condition for on-wafer devices.
Gallium nitride
vertical transistors
threshold voltage
on-resistance
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.12608/33165