Nowadays, Global Navigation Satellite Systems (GNSS) play an important role in various applications, ranging from navigation and positioning to timing synchronization. However, due to the nature of those signals, the reliability of GNSS receivers is often compromised under harsh conditions such as in the presence of interference sources. For this reason, this master thesis contains a brief overview on GNSS, interferences and on some mitigation techniques and then focuses on the analysis, design and implementation of a Pulse Blanking (PB) core on a Zynq Field-Programmable Gate Array (FPGA) with the purpose of detection and mitigation of some of those interferences.
Al giorno d’oggi, i Global Navigation Satellite Systems (GNSS) giocano un ruolo importante in vari applicativi che vanno dalla navigazione, al posizionamento alla temporizzazione. Tuttavia, per via della natura di questi segnali, l’affidabilità dei ricevitori GNSS è spesso compromessa in condizioni non ottimali come in presenza di sorgenti di interferenza. Per questo motivo, questa tesi contiene una panoramica sul mondo GNSS, sulle interferenze e su alcune delle tecniche di mitigazione per poi concentrarsi nell’analisi, il design e l’implementazione di un core di Pulse Blanking (PB) su Zynq Field-Programmable Gate Array (FPGA) con lo scopo di rilevare e mitigare gli effetti di alcune di queste interferenze.
Analysis and implementation on Zynq FPGA of a pulse blanking core for detection and mitigation of interference in GNSS context
RODIGHIERO, NICOLA
2023/2024
Abstract
Nowadays, Global Navigation Satellite Systems (GNSS) play an important role in various applications, ranging from navigation and positioning to timing synchronization. However, due to the nature of those signals, the reliability of GNSS receivers is often compromised under harsh conditions such as in the presence of interference sources. For this reason, this master thesis contains a brief overview on GNSS, interferences and on some mitigation techniques and then focuses on the analysis, design and implementation of a Pulse Blanking (PB) core on a Zynq Field-Programmable Gate Array (FPGA) with the purpose of detection and mitigation of some of those interferences.File | Dimensione | Formato | |
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https://hdl.handle.net/20.500.12608/64503