Design of a 30-GHz inductorless amplifier in a 16-nm CMOS FinFET technology

This work presents the design of an inductorless broadband amplifier in a 16nm CMOS (Complementary Metal Oxide Semiconductor) technology by Intel. In order to achieve input matching, shunt-shunt resistive feedback is employed. Despite a higher power consumption in comparison to alternative topologies, such as inductive source degeneration, this approach eliminates the necessity of coils, thereby reducing sensitivity to cross-talk and increasing integration. This can be translated into cost reduction given that the cost of a chip in a CMOS process is proportional to the square of the area. The proposed circuit, based on a fully differential Cherry-Hooper topology, occupies minimal area as no capacitors are needed. The amplifier’s simulation demonstrates a −3 dB bandwidth spanning DC to 29.7GHz, a gain of 17.3 dB, an input matching value below −9.26 dB, a NF (Noise Figure) of 3.76 dB @29.7GHz, an iIP3 (3rd order Input referred Intercept Point) of −1.62 dB @5GHz. The power consumption is 42mW. Analytical equations to evaluate the performance are obtained and then verified with the simulator. Additionally, a brief overview of the technology characterization is provided.