The semiconductor industry is not only substantially growing but also highly competitive and innovation driven. To remain competitive in an ever-changing market and capture crucial business opportunities, consistent investments in automation, digitalization, and reuse are required. In the context of this work, reuse is considered at the Intellectual Property (IP) level. IPs are, in the circuit design arena, small, coherent compartmentalized building blocks fulfilling a precise functionality (e.g. a signal converter). Infineon, along with other major semiconductor players, is developing and promoting approaches to automate circuit design and reuse of proven circuit blocks to bring faster and more products to market. IP Reuse as a methodology has immense potential to drastically reduce time-to-market, save development costs, and increase product quality and reliability. The goal of this thesis is to explore and empower the IP Reuse methodology by addressing some of the obstacles in front of it: inefficient and user-dependent metadata collection and storage, costly and ineffective use of Product Lifecycle Management (PLM) tool, and its disconnection from the circuit design environment. These goals are achieved through the introduction and implementation of a metadata pipeline covering every step from the extraction of metadata from the design environment to the storage and maintenance in PLM software suite. The implemented system consists of several stages, including extraction, validation, consistency checks, exception handling, and connection to the designated PLM tool to create and update the product's Bill of Information(BoI), which refers to a comprehensive set of documents containing all the product information needed to produce it throughout its lifecycle. By providing an intuitive and user-friendly interface to the PLM software the system allows for rapid management of BoIs, saving time and valuable resources. Initial estimates indicate that the developed system is expected to yield significant annual savings, estimated at 7,600 hours per year. This substantial reduction corresponds to 5 full-time employees, highlighting the system's massive benefits to the organization. By facilitating IP Reuse and fostering the organization-wide adoption of reuse culture, this work ultimately leads to time-to-market reduction and revenue increase.

On reusing mixed-signal integrated circuit designs via automated metadata management: a case study at Infineon Technologies AG

ÇAKMAK, HASANBERK
2024/2025

Abstract

The semiconductor industry is not only substantially growing but also highly competitive and innovation driven. To remain competitive in an ever-changing market and capture crucial business opportunities, consistent investments in automation, digitalization, and reuse are required. In the context of this work, reuse is considered at the Intellectual Property (IP) level. IPs are, in the circuit design arena, small, coherent compartmentalized building blocks fulfilling a precise functionality (e.g. a signal converter). Infineon, along with other major semiconductor players, is developing and promoting approaches to automate circuit design and reuse of proven circuit blocks to bring faster and more products to market. IP Reuse as a methodology has immense potential to drastically reduce time-to-market, save development costs, and increase product quality and reliability. The goal of this thesis is to explore and empower the IP Reuse methodology by addressing some of the obstacles in front of it: inefficient and user-dependent metadata collection and storage, costly and ineffective use of Product Lifecycle Management (PLM) tool, and its disconnection from the circuit design environment. These goals are achieved through the introduction and implementation of a metadata pipeline covering every step from the extraction of metadata from the design environment to the storage and maintenance in PLM software suite. The implemented system consists of several stages, including extraction, validation, consistency checks, exception handling, and connection to the designated PLM tool to create and update the product's Bill of Information(BoI), which refers to a comprehensive set of documents containing all the product information needed to produce it throughout its lifecycle. By providing an intuitive and user-friendly interface to the PLM software the system allows for rapid management of BoIs, saving time and valuable resources. Initial estimates indicate that the developed system is expected to yield significant annual savings, estimated at 7,600 hours per year. This substantial reduction corresponds to 5 full-time employees, highlighting the system's massive benefits to the organization. By facilitating IP Reuse and fostering the organization-wide adoption of reuse culture, this work ultimately leads to time-to-market reduction and revenue increase.
2024
On reusing mixed-signal integrated circuit designs via automated metadata management: a case study at Infineon Technologies AG
IP Reuse
Metadata
Automation
PLM
Time-to-Market
File in questo prodotto:
File Dimensione Formato  
Cakmak_Hasanberk.pdf

accesso riservato

Dimensione 2.14 MB
Formato Adobe PDF
2.14 MB Adobe PDF

The text of this website © Università degli studi di Padova. Full Text are published under a non-exclusive license. Metadata are under a CC0 License

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.12608/82083