Firmware development for the CMS DAQ readout cards

The CMS experiment and in particular the DAQ group is preparing a substantial upgrade of the data acquisition system to cope with the data volumes expected from the Phase 2 CMS detector (> 50Tb/s). The hardware to read out the sub-detectors back-end cards have been re-designed to read out the back-end boards via custom 25Gbps optical links and to transfer this data streams with a standard protocol (TCP/IP) to the CMS event building network consisting of commercial network equipment. The monitoring of the correct functioning of these data acquisition cards is essential during data taking. The cards are based on large Xilinx FPGA featuring High Bandwidth memory which is needed to buffer the incoming data stream before it is injected into the commercial TCP/IP network (socket buffers). However, the intention is to use some of the available memory for monitoring purposes by storing histograms or event fragments triggered by specific error conditions. The memory area needs to be accessible from the monitoring firmware in the FPGA and from the software controlling the card to read out the data and present it to the shift crew. The project consists of the development of firmware components with easy to use interfaces, which will be used by the monitoring firmware and software.