In contemporary high-energy physics experiments, pixels sensors have been the standard technology for vertex detectors and trackers because they offer excellent energy, temporal, and spatial resolution under high radiation levels and particle flux conditions. However, Monolithic Active Pixel Sensors (MAPS), which integrate the sensing volume and readout electronics on a single silicon wafer, are also emerging as an innovative alternative due to the significant reduction in material budget, energy consumption and production costs. Furthermore, the implementation of depleted MAPS enhances performance under high particle rate and severe irradiation level conditions. A Large Ion Collider Experiment (ALICE) at CERN’s Large Hadron Collider (LHC) is a pioneer in the large-scale deployment of MAPS, with its current Inner Tracking System 2 using MAPS based on a 180 nm Complementary Metal-Oxide Semiconductor (CMOS) technology. The next upgrade intends to replace the three central layers with ITS3, a seamless cylindrical tracker composed of ultra-thin, curved, wafer-scale MAPS fabricated using a 65 nm CMOS node. This novel detector will be located just 2 mm from the beampipe, pushing the limits of mechanical design and sensor performance. This thesis aims at the characterization of prototypes MAPS in CMOS 65 nm technology manufactured as part of the ITS3 detector R&D project, specifically on reticle units of the Monolithic Stitched Sensor (MOSS) prototype chip, a building block in the development of the final detector.

In contemporary high-energy physics experiments, pixels sensors have been the standard technology for vertex detectors and trackers because they offer excellent energy, temporal, and spatial resolution under high radiation levels and particle flux conditions. However, Monolithic Active Pixel Sensors (MAPS), which integrate the sensing volume and readout electronics on a single silicon wafer, are also emerging as an innovative alternative due to the significant reduction in material budget, energy consumption and production costs. Furthermore, the implementation of depleted MAPS enhances performance under high particle rate and severe irradiation level conditions. A Large Ion Collider Experiment (ALICE) at CERN’s Large Hadron Collider (LHC) is a pioneer in the large-scale deployment of MAPS, with its current Inner Tracking System 2 using MAPS based on a 180 nm Complementary Metal-Oxide Semiconductor (CMOS) technology. The next upgrade intends to replace the three central layers with ITS3, a seamless cylindrical tracker composed of ultra-thin, curved, wafer-scale MAPS fabricated using a 65 nm CMOS node. This novel detector will be located just 2 mm from the beampipe, pushing the limits of mechanical design and sensor performance. This thesis aims at the characterization of prototypes MAPS in CMOS 65 nm technology manufactured as part of the ITS3 detector R&D project, specifically on reticle units of the Monolithic Stitched Sensor (MOSS) prototype chip, a building block in the development of the final detector.

Characterization of stitched sensors for the new Inner Tracking System (ITS3) of the ALICE experiment

TISCARENO MONTOYA, LUZ ELENA
2024/2025

Abstract

In contemporary high-energy physics experiments, pixels sensors have been the standard technology for vertex detectors and trackers because they offer excellent energy, temporal, and spatial resolution under high radiation levels and particle flux conditions. However, Monolithic Active Pixel Sensors (MAPS), which integrate the sensing volume and readout electronics on a single silicon wafer, are also emerging as an innovative alternative due to the significant reduction in material budget, energy consumption and production costs. Furthermore, the implementation of depleted MAPS enhances performance under high particle rate and severe irradiation level conditions. A Large Ion Collider Experiment (ALICE) at CERN’s Large Hadron Collider (LHC) is a pioneer in the large-scale deployment of MAPS, with its current Inner Tracking System 2 using MAPS based on a 180 nm Complementary Metal-Oxide Semiconductor (CMOS) technology. The next upgrade intends to replace the three central layers with ITS3, a seamless cylindrical tracker composed of ultra-thin, curved, wafer-scale MAPS fabricated using a 65 nm CMOS node. This novel detector will be located just 2 mm from the beampipe, pushing the limits of mechanical design and sensor performance. This thesis aims at the characterization of prototypes MAPS in CMOS 65 nm technology manufactured as part of the ITS3 detector R&D project, specifically on reticle units of the Monolithic Stitched Sensor (MOSS) prototype chip, a building block in the development of the final detector.
2024
Characterization of stitched sensors for the new Inner Tracking System (ITS3) of the ALICE experiment
In contemporary high-energy physics experiments, pixels sensors have been the standard technology for vertex detectors and trackers because they offer excellent energy, temporal, and spatial resolution under high radiation levels and particle flux conditions. However, Monolithic Active Pixel Sensors (MAPS), which integrate the sensing volume and readout electronics on a single silicon wafer, are also emerging as an innovative alternative due to the significant reduction in material budget, energy consumption and production costs. Furthermore, the implementation of depleted MAPS enhances performance under high particle rate and severe irradiation level conditions. A Large Ion Collider Experiment (ALICE) at CERN’s Large Hadron Collider (LHC) is a pioneer in the large-scale deployment of MAPS, with its current Inner Tracking System 2 using MAPS based on a 180 nm Complementary Metal-Oxide Semiconductor (CMOS) technology. The next upgrade intends to replace the three central layers with ITS3, a seamless cylindrical tracker composed of ultra-thin, curved, wafer-scale MAPS fabricated using a 65 nm CMOS node. This novel detector will be located just 2 mm from the beampipe, pushing the limits of mechanical design and sensor performance. This thesis aims at the characterization of prototypes MAPS in CMOS 65 nm technology manufactured as part of the ITS3 detector R&D project, specifically on reticle units of the Monolithic Stitched Sensor (MOSS) prototype chip, a building block in the development of the final detector.
pixel detectors
MAPS
ALICE experiment
CMOS technology
ITS3
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.12608/89021