In this Master’s thesis, a thin-film of Al2O3 insulating material is deposited on a β-Ga2O3 substrate via mist-CVD. This innovative technique allows low-cost deposition and a variety of compatible materials. To assess the quality of the film, AFM, EDX and ellipsometry measurements are performed. Subsequently, metal contacts are formed through a metallization process, and a MIS capacitor is fabricated. Finally, electrical characterization is conducted to evaluate the density of interface trap states Dit at the semiconductor/insulator interface. The primary objective of this research is to investigate whether gate insulating layers deposited by mist-CVD can achieve low interface state density Dit in β-Ga2O3 based devices. This Master’s thesis was carried out during the exchange period at the Kyoto Institute of Technology (KIT) in Japan.
In questa tesi magistrale, una pellicola sottile di materiale isolante Al2O3 è depositata su un substrato di β-Ga2O3 tramite mist-CVD. Questa tecnica innovativa permette una deposizione a basso costo e l’utilizzo di una varietà di materiali compatibili. Per valutare la qualità della pellicola, vengono effettuate misurazioni AFM, EDX ed ellissometria. Successivamente, tramite un processo di metallizzazione, vengono formati i contatti metallici e si realizza un condensatore MIS. Infine, viene eseguita una caratterizzazione elettrica per valutare la densità degli stati trappola Dit all’interfaccia tra semiconduttore e isolante. L’obiettivo principale di questa ricerca è investigare se gli strati isolanti dei gate depositati tramite mist-CVD possano avere una bassa densità di stati trappola Dit nei dispositivi basati su β-Ga2O3. Questa tesi magistrale è stata svolta durante il periodo di scambio presso il Kyoto Institute of Technology (KIT) in Giappone.
Fabrication and Characterization of MIS Structures using an Insulating Layer deposited via Mist-CVD
CARRERA, FEDERICO
2024/2025
Abstract
In this Master’s thesis, a thin-film of Al2O3 insulating material is deposited on a β-Ga2O3 substrate via mist-CVD. This innovative technique allows low-cost deposition and a variety of compatible materials. To assess the quality of the film, AFM, EDX and ellipsometry measurements are performed. Subsequently, metal contacts are formed through a metallization process, and a MIS capacitor is fabricated. Finally, electrical characterization is conducted to evaluate the density of interface trap states Dit at the semiconductor/insulator interface. The primary objective of this research is to investigate whether gate insulating layers deposited by mist-CVD can achieve low interface state density Dit in β-Ga2O3 based devices. This Master’s thesis was carried out during the exchange period at the Kyoto Institute of Technology (KIT) in Japan.| File | Dimensione | Formato | |
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Carrera_Federico.pdf
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https://hdl.handle.net/20.500.12608/90312