Tensor Networks (TNs) are a computational framework originally developed to model quantum many-body systems. More recently, they have shown promising results in Machine Learning (ML), achieving performance on par with conventional supervised learning approaches. In this work, we explore the implementation of Tree Tensor Networks (TTNs) for high-frequency, real-time ML applications by leveraging the low-latency and high-throughput capabilities of the AI Engine in Versal SoCs. We describe the deployment of TTN classifiers on this hardware accelerator, specifically optimized for inference on standard ML benchmarking datasets. Different levels of parallelism are investigated to assess the balance between resource usage and latency. By fully offloading the TTN inference to the AI Engine embedded in the Versal SoC, we demonstrate the platform’s potential for enabling real-time machine learning at the edge.

Tensor Networks (TNs) are a computational framework originally developed to model quantum many-body systems. More recently, they have shown promising results in Machine Learning (ML), achieving performance on par with conventional supervised learning approaches. In this work, we explore the implementation of Tree Tensor Networks (TTNs) for high-frequency, real-time ML applications by leveraging the low-latency and high-throughput capabilities of the AI Engine in Versal SoCs. We describe the deployment of TTN classifiers on this hardware accelerator, specifically optimized for inference on standard ML benchmarking datasets. Different levels of parallelism are investigated to assess the balance between resource usage and latency. By fully offloading the TTN inference to the AI Engine embedded in the Versal SoC, we demonstrate the platform’s potential for enabling real-time machine learning at the edge.

Exploring the use of the AI engines present in the last generation of Versal adaptive SoCs for implementing Tree Tensor Network for ultra-low latency applications

MAJIDI, PARSA
2024/2025

Abstract

Tensor Networks (TNs) are a computational framework originally developed to model quantum many-body systems. More recently, they have shown promising results in Machine Learning (ML), achieving performance on par with conventional supervised learning approaches. In this work, we explore the implementation of Tree Tensor Networks (TTNs) for high-frequency, real-time ML applications by leveraging the low-latency and high-throughput capabilities of the AI Engine in Versal SoCs. We describe the deployment of TTN classifiers on this hardware accelerator, specifically optimized for inference on standard ML benchmarking datasets. Different levels of parallelism are investigated to assess the balance between resource usage and latency. By fully offloading the TTN inference to the AI Engine embedded in the Versal SoC, we demonstrate the platform’s potential for enabling real-time machine learning at the edge.
2024
Exploring the use of the AI engines present in the last generation of Versal adaptive SoCs for implementing Tree Tensor Network for ultra-low latency applications
Tensor Networks (TNs) are a computational framework originally developed to model quantum many-body systems. More recently, they have shown promising results in Machine Learning (ML), achieving performance on par with conventional supervised learning approaches. In this work, we explore the implementation of Tree Tensor Networks (TTNs) for high-frequency, real-time ML applications by leveraging the low-latency and high-throughput capabilities of the AI Engine in Versal SoCs. We describe the deployment of TTN classifiers on this hardware accelerator, specifically optimized for inference on standard ML benchmarking datasets. Different levels of parallelism are investigated to assess the balance between resource usage and latency. By fully offloading the TTN inference to the AI Engine embedded in the Versal SoC, we demonstrate the platform’s potential for enabling real-time machine learning at the edge.
AI Engine
Tree Tensor Network
Embedded Systems
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.12608/93348