The main target of the JUNO experiment is the determination of the neutrino mass hierarchy, which will be accessible through measurement of the antineutrino spectrum coming from nuclear plants located about 53 km away from the experimental site. An excellent energy resolution and a large detector fiducial volume are a key ingredient. This consists in 20 kton liquid scintillator detector observed by about 18'000 large PMT in order to reconstruct any interesting neutrino event. The JUNO experiment requires a discrimination capacity to the single photoelectron. The aim of the thesis is to illustrate the design of the algorithm implemented in FPGA, to discrimniate signal pulses from electronics background noise. After having defined all the steps of the algorithm, Matlab simulations are presented together with hardware implementation simulations. A testing of the trigger algorithm is also performed, in order to verify the successfull implementation into the FPGA and to compare it to a simple leading-edge trigger algorithm.

Design and tests of the FPGA embedded trigger algorithms for the large PMT JUNO Electronics

Marini, Filippo
2018/2019

Abstract

The main target of the JUNO experiment is the determination of the neutrino mass hierarchy, which will be accessible through measurement of the antineutrino spectrum coming from nuclear plants located about 53 km away from the experimental site. An excellent energy resolution and a large detector fiducial volume are a key ingredient. This consists in 20 kton liquid scintillator detector observed by about 18'000 large PMT in order to reconstruct any interesting neutrino event. The JUNO experiment requires a discrimination capacity to the single photoelectron. The aim of the thesis is to illustrate the design of the algorithm implemented in FPGA, to discrimniate signal pulses from electronics background noise. After having defined all the steps of the algorithm, Matlab simulations are presented together with hardware implementation simulations. A testing of the trigger algorithm is also performed, in order to verify the successfull implementation into the FPGA and to compare it to a simple leading-edge trigger algorithm.
2018-04-17
63
JUNO FPGA TRIGGER PMT
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.12608/27328