The purpose of this thesis is to use a JFET transistor as a voltage controlled resistor. The merits and defects that the use of this specific configuration entails will be illustrated and we will discuss about remedies to drawbacks such as the non-linearity of the trend of the resistance value and the introduced harmonic distortion. Finally, circuit realizations that exploit the properties of voltage controlled resistors to implement certain functions or make adjustments sometimes maded automatically will be presented and simulated.
La trattazione di questa tesi è volta a descrivere il funzionamento del transistor JFET come resistore controllato in tensione. Saranno illustrati i pregi e i difetti che l’utilizzo di questa specifica configurazione comporta e si discuterà sui rimedi ad inconvenienti come la non linearità dell’andamento del valore della resistenza e la distorsione armonica introdotta. Verranno infine presentate e simulate delle realizzazioni circuitali che sfruttano le proprietà dei resistori controllati in tensione per implementare delle determinate funzioni o effettuare delle regolazioni talvolta rese automatiche.
Junction Field Effect Transistor in configurazione Resistore Controllato in Tensione
SCARPA, DANIELE
2021/2022
Abstract
The purpose of this thesis is to use a JFET transistor as a voltage controlled resistor. The merits and defects that the use of this specific configuration entails will be illustrated and we will discuss about remedies to drawbacks such as the non-linearity of the trend of the resistance value and the introduced harmonic distortion. Finally, circuit realizations that exploit the properties of voltage controlled resistors to implement certain functions or make adjustments sometimes maded automatically will be presented and simulated.File | Dimensione | Formato | |
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https://hdl.handle.net/20.500.12608/32561