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Tipologia Anno Titolo Titolo inglese Autore File
Lauree magistrali 2024 Design of 32-Bit Floating Point CORDIC Co-Processor Design of 32-Bit Floating Point CORDIC Co-Processor HOSEN, SHAKIL
Lauree magistrali 2024 Developement of high speed differential data transceiver for Horeca appliances Developement of high speed differential data transceiver for Horeca appliances PALLARO, ALESSANDRO
Lauree triennali 2024 Evaluation of an adaptive driving beam system used in automotive front light applications Evaluation of an adaptive driving beam system used in automotive front light applications VELJA, CHRIS
Lauree triennali 2021 Evoluzione della Adaptive Computing nei dispositivi Xilinx Evolution of Xilinx adaptive computing SOLONARU, BOGDAN
Lauree triennali 2020 FPGA come acceleratore hardware di reti neurali convoluzionali Overview of FPGAs used as a hardware accelerator of convolutional neural networks SARTORI, PIERFRANCESCO
Lauree triennali 2021 FPGA Kintex UltraScale per applicazioni spaziali FPGA Kintex UltraScale for space applications VERGERIO, EDOARDO
Lauree triennali 2024 FPGA nell'industria automotive: caratteristiche, applicazioni e vantaggi. FPGA in the Automotive Industry: characteristics, applications, and benefits. POSENATO, FILIPPO
Lauree magistrali 2024 FPGA-Based Stepper Motor Control Board with Automatic Acceleration Management FPGA-Based Stepper Motor Control Board with Automatic Acceleration Management RAGAZZO, ALBERTO
Lauree magistrali 2022 FPGA-LabVIEW Virtual Platform for Verification Environment and Lab Test Acceleration FPGA-LabVIEW Virtual Platform for Verification Environment and Lab Test Acceleration FASOLATO BASILIO, ELDER
Lauree triennali 2021 FPGA: l'avanguardia dell'accelerazione hardware per l'Intelligenza Artificiale FPGA: the cutting edge of hardware acceleration for Artificial Intelligence BELLIN, SOFIA
Lauree triennali 2023 Generation of a Customer FMEDA with customizable functions Generation of a Customer FMEDA with customizable functions MUFFATO, LUCA
Lauree triennali 2022 Generatore di forme d'onda realizzato con FPGA Waveform generator implemented with FPGA BORTOLINI, LUCA
Lauree magistrali 2023 Hardware Implementation of a Spiking Neural Network for online processing of muon detectors datastream Hardware Implementation of a Spiking Neural Network for online processing of muon detectors datastream TOFFANO, MARCO
Lauree triennali 2020 High-level synthesis: un approccio innovativo alla progettazione digitale High-level synthesis: an innovative approach to digital design FONTANA, TULLIA
Lauree triennali 2021 Implementazione della CPU Z80 su FPGA: un primo approccio Implementation of the Z80 CPU on FPGA: a first approach BIASIN, GIACOMO
Lauree triennali 2011 Implementazione di un encoder LDPC DVB-T2 su piattaforma FPGA - Biadene, Davide
Lauree triennali 2012 Implementazione su FPGA di un generatore di forme d'onda programmabile basato su tecnica DDS - Brian, Michele
Lauree magistrali 2021 Instruction set optimizations for Edge AI computing on a low-area microprocessor Instruction set optimizations for Edge AI computing on a low-area microprocessor PAFFI, LEONARDO
Lauree magistrali 2021 Integrazione di una comunicazione WiFi in un dispositivo biomedicale holter Integration of a WiFi comunication in a holter biomedical device NETTO, DAMIANO
Lauree triennali 2021 Interfaccia basata su FPGA per collaudo sistemi di diagnosi in ambito automotive FPGA-based interface for automotive diagnostics testing PITTARO, LORENZO
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